This week’s History of Fiber Optics comes from George Gilder’s book, “Telecosm” and it’s about the technological nuts and bolts required to make fiber optic telecommunications a reality…Synchronizing the movement of signals across the micro-chip is the pulse of a piezoelectric crystal clock. An 800-megahertz chip-a high end Pentium III for instance–has a clock pulsing 800 million times a second. To coordinate all the functions of the processor, the clock pulse must reach all portions of the chip within the time that it takes for a transistor’s switch to flip from on to off. But this is the last generation of processors in which the pulse can actually reach across the entire chip within this time-span. In the .10 micron devices now emerging from laboratories, the clock pulse will be able to reach only 16 percent of the chip. Hitting the light speed barrier, the chip’s architecture will necessarily fragment into separate modules and asynchronous (not synchronous) structures. We might term these processors now under development time/space mollusks-Einstein’s word for entities in a relativistic world-with their size limited by the systole (rhythmically recurrent contraction) of a light pulse. Setting the size of the integrated circuit module will be a measure tantamount in the microcosm to light-years in the cosmos. Moving off the silicone surface, the tiny electric charges boost themselves down the metal pins of the package, which are the legs of the millipede-like chip. Then these signals run out onto the expanse of the backplane buses and motherboards of a computer. That too takes up critical time.

Once the signal leaves the chip surface and moves to the pins, the problem begins to get even more acute. Rent’s rule states that pins multiply by the square of the root of the number of transistors. In other words, while the number of transistors rises from seven million on a Pentium II to a hundred million on a new generation processor-a factor of sixteen-the number of pins ekes up by a factor of four. Some of these pins are for power and ground connections, not data. Nonetheless Rent’s rule makes it progressively harder to get data off the chip where we can use it.

William Dally of MIT estimates that by 2010, the number of transistors will have raised one thousand fold and the number of data pins tenfold. With millions of times more transistors than links to the outside world, the chip faces a light-speed crisis that requires radical change in the time-space relations of processors and memories.

Until recently, the effective speed of Intel microprocessors was measured by the clock rate, which mostly depended on how closely together its chief technical officer Gerry Parker could pack transistors onto a chip. For the last several years, however, the effective speed of the microprocessor depends not on the clock rate but on the time it takes to fetch an instruction from memory.

Richard Sites of Compaq subsidiary Digital Equipment Corporation estimates that the newest Pentiums and Alphas spend 80 percent of their time in wait states, making time while the signals dawdle down the pins and across the bus to retrieve the data needed to perform instructions. In sum the latency, the growing gap between the processor speeds and memory access times. We can speed-up clock rates, expand bus sizes, increase bandwidth and capacity of memories by throwing money at the problem. A few billion dollars a year, per facility could do that, but latency-the delay between the issuing of an instruction and the retrieval of needed data from memory-is determined by the time it takes for a signal’s round trip from the processor down the pins to the needed memory address, and that delay is set by the speed of light. Money cannot change the speed of light unless we can bribe God. At least for now, it’s as Einstein said; light-speed is the universal speed-limit!”

The Waynedale News Staff


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